View AM55-0004_89387.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Preliminary Specifications
250 mW Linear Power Amplifier and T/R Switch 1.8 - 2.0 GHz AM55-0004
Features
q q q q q q
SSOP-28
+.0025 .0275 -.0025 0,7 +0,06 -0,06 +.0034 .1540 -.0043 .236 .008 +0,09 5,99 0,2 3,91 -0,11 +.0037 .3900 -.0041 +0,09 9,91 -0,1
Operates Over Full PCN/PCS/PHS Bands Operates Over +3 V to +5 V Supply Voltage +24 dBm P1dB Typical at PA Out 35% PAE @ P1dB for Linear Operation On-Chip T/R Switch, Linear Operation to +30 dBm Low Cost SSOP-28 Plastic Package
PIN 1
Description
M/A-COM's AM55-0004 power amplifier/switch integrates a power amplifier and transmit/receive switch in a low cost SSOP package. The power amplifier delivers +24 dBm of linear power with high efficiency and can be operated at supply voltages as low as 2.7 V. It is ideally suited for QPSK or other linearly modulated systems in the 1.8 to 2.0 GHz frequency band. The power amplifier/switch is fully monolithic and requires only one output capacitor for power match. The T/R switch achieves good insertion loss and isolation without degrading the overall linearity. The AM55-0004 is ideally suited for final stage power amplification in linear TDD systems. The integrated switch is convenient for duplexing. The AM55-0004 can also be used as a driver stage for high power systems. Typical applications include Japanese PHS systems or PCN/PCS transmit chains. M/A-COM's AM55-0004 is fabricated using a mature 0.5-micron gate length GaAs process. The process features full passivation for increased performance and reliability.
.057 .003 1,45 0,08
.015 (0,38) X 45
+.0018 .0080 -.0005 0,2 +0,05 -0,01 0-8 +.022 .028 -.013 +0,56 0,71 -0,33
.007 .003 0,18 0,08
.025 0,64
+.004 .010 -.001 0,25 +0,1 -0,03 .004 (0,10)
Dimensions are inches over millimeters.
Ordering Information
Part Number AM55-0004 AM55-0004TR AM55-0004RTR AM55-0004SMB Description SSOP 28-Lead Plastic Package Forward Tape & Reel* Reverse Tape & Reel* Designer's Kit
* If specific reel size is required, consult factory for part number assignment.
Typical Electrical Specifications
Test conditions: Frequency: 1.9 GHz, VDD1 = VDD2 = 4.8 V 10%, VG1 adjusted for 30 mA quiescent bias on VDD1, VG2 adjusted for 65 mA quiescent bias on VDD2, TA = +25C
Parameter Power Amplifier Linear Gain Power Output @ P1dB at PA OUT port Current From Positive Supply @ P1dB Input VSWR T/R Switch Insertion Loss Input Match Isolation
Specifications Subject to Change Without Notice
Units dB dBm mA
Min. 22 22.5 75
Typ. 24 24 175 2.0:1 0.6 1.5:1 20
Max.
275
dB dB 15
1.0
V2.00 s
M/A-COM Inc.
s
1011 Pawtucket Boulevard, Lowell, MA 01853 USA
Telephone: 800-366-2266
1
250 mW Linear Power Amplifier and T/R Switch Absolute Maximum Ratings1
Parameter Max. Input Power2 Operating Voltages2 Absolute Maximum +23 dBm VDD = 7 V VGG = -5 V VDD - VGG = 8 V -40C to +85C -65C to +150C
AM55-0004 Truth Table
Operating Mode PA Tx PA Sleep T/R Switch Tx T/R Switch Rx
X - Don't Care
VSW X X 0 Volts -4.0 Volts
VSW X X -4.0 Volts 0 Volts
SAVE Tx 0V -4.0 Volts X X
Operating Temperature Storage Temperature
1. Exceeding these limits may cause permanent damage. 2. Ambient temperature (TA) = +25C
Pin Configuration
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 Pin Name GND VSW GND Tx IN GND GND ANT IN/OUT GND Rx OUT GND GND VDD1 SAVE Tx Description DC and RF Ground Complimentary T/R Switch Control, -4 V Tx mode/0 V Rx mode DC and RF Ground Transmit side of T/R switch DC and RF Ground DC and RF Ground Common port of T/R switch which is connected to the antenna DC and RF Ground Receive side of T/R switch DC and RF Ground DC and RF Ground Positive bias for the first stage of PA, +2.7 to +6.0 volts Sleep mode control of first stage of PA ONLY 0 V -- first PA stage on -4 V -- first PA stage off DC and RF Ground DC and RF Ground RF input of the Power Amplifier DC and RF Ground Negative bias control for the first PA stage, voltage divider is on the MMIC, adjusted to set VDD1 quiescent bias current, which is typically 30 mA. Input impedance: 10 k DC and RF Ground Negative bias control for the second PA stage, adjusted to set VDD2 quiescent bias current, which is typically 65 mA. Input impedance: > 1M Second Stage DC and RF Ground Second Stage DC and RF Ground Second Stage DC and RF Ground Second Stage DC and RF Ground RF output of the Power Amplifier Positive bias for the second stage of the PA, +2.7 to +6.0 volts T/R Switch Control, 0 V Tx mode/-4 V Rx mode DC and RF Ground
Functional Diagram and Pin Configuration
1
GND VSW GND Tx IN GND GND ANT IN/OUT GND Rx OUT GND GND VDD1 SAVE Tx GND
28
GND VSW VDD1 DD2 PA OUT GND GND GND GND VG1 G2 GND VG1 G2 GND PA IN GND
14
15
14 15 16 17 18
GND GND PA IN GND VG1
19 20
GND VG2
21 22 23 24 25 26 27 28
GND GND GND GND PA OUT VDD2 VSW GND
Specifications Subject to Change Without Notice
V 2.00 s
M/A-COM Inc.
s
1011 Pawtucket Boulevard, Lowell, MA 01853 USA
Telephone: 800-366-2266
2
250 mW Linear Power Amplifier and T/R Switch
AM55-0004
Power Amplifier Small Signal Performance1
Power Amplifier CW Performance at 1.9 GHz1
GAIN 27 6.0 V 4.8 V 21 3.6 V 18 3.0 V 15 1.50 1.75 2.00 FREQUENCY (GHz) 2.25 2.50 POWER (dBm) 24 GAIN (dB) 28
POWER OUTPUT 6.0 V 26 24 22 20 3.0 V 18 -5 -3 -1 PIN (dBm) 1 3 3.6 V 4.8 V
INPUT MATCH 0 RETURN LOSS (dB) -5 -10 -15 -20 -25 1.50 1.75 3.0 V 3.6 V 6.0 V 4.8 V PAE (%) 45
POWER ADDED EFFICIENCY (%) 3.0 V 35 25 6.0 V 15 5 2.00 FREQUENCY (GHz) 2.25 2.50 -5 -3 -1 PIN (dBm) 1 3 4.8 V 3.6 V
OUTPUT MATCH 0 RETURN LOSS (dB) -5 4.8 V -10 3.0 V -15 3.6 V -20 -25 1.50 1.75 2.00 FREQUENCY (GHz) 2.25 2.50 COMPRESSION (dB) 6.0 V 0 -1 -2 -3 -4 -5
GAIN COMPRESSION
6.0 V 4.8 V 3.0 V 3.6 V -5 -3 -1 PIN (dBm) 1 3
1. All data measured at TA = +25C and VG1, VG2 adjusted for first stage quiescent current of 30 mA and second stage current of 65 mA, respectively.
Specifications Subject to Change Without Notice
V 2.00 s
M/A-COM Inc.
s
1011 Pawtucket Boulevard, Lowell, MA 01853 USA
Telephone: 800-366-2266
3
250 mW Linear Power Amplifier and T/R Switch
AM55-0004
Power Amplifier Temperature Performance1
Power Amplifier Spurious Response at Various Supply Voltages1
LINEAR GAIN, VDD1 = VDD2 = 4.8 V 27 -15C 24 GAIN (dB) +25C 21 +70C 18 15 1.50 1.75 2.00 2.25 2.50 FREQUENCY (GHz) IMR (dBc) 25 30
THIRD ORDER INTERMODULATION RATIO @ 1.9 GHz (TONE SPACING 600 KHz) 6.0 V
4.8 V 20 15 10 3.0 V 3.6 V 15 17 19 21 23 FUNDAMENTAL POUT/TONE (dBm) 25
POWER OUTPUT @ 1.9 GHz, VDD1 = VDD2 = 4.8 V 28 +25C POWER (dBm) 26 -15C dBc 24 22 20 18 -5 -3 -1 PIN (dBm) +70C 1 3 50 60
2ND HARMONIC RATIO @ 1.9 GHz 4.8 V 4.0 V 40 3.0 V 30 20
10
13
16
19
22
25
FUNDAMENTAL POUT (dBm)
40 35 PAE (%) 30 25 20 15 10
POWER ADDED EFFICIENCY (%) @ 1.9 GHz, VDD1 = VDD2 = 4.8 V 80 -15C 75 dBc +25C 70 65 60
3RD HARMONIC RATIO @ 1.9 GHz 4.8 V 4.0 V
+70C
3.0 V 55 50
-5
-3
-1 PIN (dBm)
1
3
10
13
16
19
22
25
FUNDAMENTAL POUT (dBm)
1. All data measured at TA = +25C and VG1, VG2 adjusted for first stage quiescent current of 30 mA and second stage current of 65 mA, respectively.
Specifications Subject to Change Without Notice
V 2.00 s
M/A-COM Inc.
s
1011 Pawtucket Boulevard, Lowell, MA 01853 USA
Telephone: 800-366-2266
4
250 mW Linear Power Amplifier and T/R Switch
AM55-0004
Power Amplifier Spectral Response Under Modulation Drive
(/4 DQPSK, = 0.5, 384 kB/sec, 9-bit PN code)
SPECTRAL RESPONSE UNDER MODULATION1 (VD = 3.0 V, POUT = 20.5 dBm)
Transmit/Receive Switch Performance
INSERTION LOSS 0.0 -15C +25C -0.5 LOSS (dB) -1.0 +70C -1.5 -2.0
0 POWER SPECTRAL DENSITY (dBc) -20 -40 -60 -80
1899.0
1899.4
1899.8
1900.2
1900.6
1901.0
1.50
1.75
FREQUENCY (MHz) SPECTRAL RESPONSE UNDER MODULATION1 (VD = 4.8 V, POUT = 23.4 dBm) 0 POWER SPECTRAL DENSITY (dBc) ISOLATION (dB) -10 -20 -30 -40 -50 -60 -70 -40
1899.0 1899.4 1899.8 1900.2 1900.6 1901.0
2.00 2.25 FREQUENCY (GHz)
2.50
ISOLATION (@ -15C, +25C and +70C) -20 -25 -30 -35
1.50
1.75
FREQUENCY (MHz)
2.00 2.25 FREQUENCY (GHz)
2.50
RETURN LOSS (@ -15C, +25C and +70C) RETURN LOSS (dB)
0 -5 -10 -15 -20 -25 -30 -35 1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 2.5
Output Power Under Modulation2
VD (volts) 3 3.6 4 4.8 6 POUT (dBm) 20.5 21.4 22.2 23.4 23.7
In Out
FREQUENCY (GHz) LINEARITY (Tx MODE) 31 29 27 25 23 25 26 27 28 29 30 31 32 POWER IN (dBm) 33 1.5 0.5 -0.5 -1.5 -2.5 34 COMPRESSION (dB) POWER OUT (dBm) 33 2.5
1. Spectral output is tested under the following conditions: Modulation scheme is /4 DQPSK with a bit transfer rate of 384 kB/sec and a root Nyquist filter with = 0.5 per RCR STD-28. The spectrum analyzer settings are as follows: Resolution bandwidth: 10 kHz Video bandwidth: 100 kHz Sweep time: 5 seconds 2. This chart documents the modulated output power delivered for a fixed adjacent channel interference (ACI) rejection of 55 dBc at a 600-kHz offset.
Specifications Subject to Change Without Notice
V 2.00 s
M/A-COM Inc.
s
1011 Pawtucket Boulevard, Lowell, MA 01853 USA
Telephone: 800-366-2266
5
250 mW Linear Power Amplifier and T/R Switch
AM55-0004
Recommended PCB Configuration
Layout View
0.700 in.
Cross-Section View
RF Traces + Components
Pin 1
C1
C6 C9
RF Ground DC Routing Customer Defined
C10 R3 0.490 in. C5 C3 C8 C4
C2 R2 R1
C7
The PCB dielectric between RF traces and RF ground layers should be chosen to reduce RF discontinuities between 50- lines and package pins. M/A-COM recommends an FR-4 dielectric thickness of 0.008 in. (0.2 mm), yielding a 50- line width of 0.015 in. (0.38 mm). The recommended metalization thickness is 1 oz. copper. Shaded traces are vias to DC routing layer and traces on DC routing layer.
External Circuitry Parts List
Label C1 - C5 C6 - C8 C9 C10 R1 R2 R3 Tline Value 1000 pF 68 pF 1.5 pF 15 pF 2.7 k 1.5 k 150 0.250 in. long Purpose Low frequency bypass RF bypass Output power tuning Reduces low frequency gain Voltage divider to VG2 Voltage divider to VG2 Reduces low frequency gain Power match
Biasing Procedure The AM55-0004 requires that VGG bias be applied prior to any VDD bias. Permanent damage may occur if this procedure is not followed. All FETs in the PA will draw excessive current and damage internal circuitry.
All off-chip components are low-cost surface mount components obtainable from multiple sources. (0.020 in. x 0.040 in. or 0.030 in. x 0.050 in.)
External Circuitry
VSW 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VDD2 C1 C6
VSW Tx IN
TLine
PA OUT C9
ANT IN/OUT Rx OUT VDD1 C8 C5
C10 R1 R3 C2 VG2 R2
Save Tx C4
C3
C7
VG1 PA IN
Specifications Subject to Change Without Notice
V 2.00 s
M/A-COM Inc.
s
1011 Pawtucket Boulevard, Lowell, MA 01853 USA
Telephone: 800-366-2266
6
250 mW Linear Power Amplifier and T/R Switch Designer's Kit (AM55-0004SMB)
AM55-0004
The AM55-0004SMB Designer's Kit allows for immediate evaluation of M/A-COM's AM55-0004 integrated Power Amplifier and T/R Switch. The evaluation board consists of an AM55-0004, recommended external surface mount circuitry, RF connectors and a DC multipin connector, all mounted to a multi-layer FR-4 PCB. Other items included in the Designer's Kit: a floppy disk (with typical performance data and a .DXF file of the recommended PCB layout) and any additional Application Notes. The AM55-0004SMB PA/Switch evaluation PCB and block diagram are illustrated below with all functional ports labeled.
P/A Switch Sample Board
VG1 VDD1 VDD2
Functional Block Diagram
Tx IN
PA OUT
TX IN
SAVE T
VSW
VSW VG2
ANT IN/OUT
PA OUT ANT IN/OUT
RX OUT
PA IN
Rx OUT PA IN
DC Connector Pinout
PCB DC Connector 1 2 3 4 5 6 7 8 9 10 Function N/C VDD1 (+ 4.8 V) SAVE Tx (0 V/-4 V) GND SAVE Tx (0 V/-4 V) VG1 VSW GND VSW VG1 Device Pin Number N/C 12 13 N/C 13 18 2 N/C 2 18 PCB DC Connector 11 12 13 14 15 16 17 18 19 20 Function VSW VG1 VSW GND VG2 VG1 N/C VG2 N/C VDD2 ( + 4.8 V) Device Pin Number 27 18 27 N/C 20 18 N/C 20 N/C 26
Specifications Subject to Change Without Notice
V 2.00 s
M/A-COM Inc.
s
1011 Pawtucket Boulevard, Lowell, MA 01853 USA
Telephone: 800-366-2266
7
250 mW Linear Power Amplifier and T/R Switch
AM55-0004
AM55-0004SMB Biasing Procedure
In order to prevent transients which may damage the MMIC, please adhere to the following procedure. * Turn on all power supplies and set all voltages to 0 volts BEFORE connecting the power supplies to the DC connector. * Apply -4.0 volt supply or GND to DC connector pin 9 (VSW, see truth table for desired mode). * Apply -4.0 volt supply or GND to DC connector pin 13 (VSW, see truth table for desired mode). * Apply a -4.0 volt supply to the DC connector pin 16 (VG1). * Apply a -4.0 volt supply to the DC connector pin 18 (VG2). * Apply a +4.8 volt supply to the DC connector pin 2 (VDD1). * Apply a +4.8 volt supply to the DC connector pin 20 (VDD2). * Apply GND to DC connector pin 5 (Save Tx). * Adjust VG1 supply for desired VDD1 quiescent current (typically 30 mA). * Adjust VG2 supply for desired VDD2 quiescent current (typically 65 mA). * Change voltage on DC connector pin 5 as required (Save Tx, see truth table for desired mode). * Apply RF power and test. * To power off, reverse above procedure 1. Set VG1 & VG2 to -4 V. 2. 3. 4. 5. Set VDD1 & VDD2 to 0 V. Set control voltage supplies to 0 V. Disconnect bias lines from DC connector. Turn off power supplies.
Evaluation PCB and RF Connector Losses
Port Reference PA IN PA OUT Tx IN ANT IN/OUT Rx OUT Estimated Loss (dB) 0.15 0.20 0.20 0.20 0.20
The DC connector on the Designer's Kit PCB allows selection of all the device's operating modes. It is accomplished by one or more of the following methods: 1. A mating female multi-pin connector (Newark Electronics Stock # 46F-4658, not included) 2. Wires soldered to the necessary pins (not included) 3. Clip leads (not included) 4. A combination of clip leads or wires and jumpers (jumpers included as required)
Specifications Subject to Change Without Notice
V 2.00 s
M/A-COM Inc.
s
1011 Pawtucket Boulevard, Lowell, MA 01853 USA
Telephone: 800-366-2266
8

▲Up To Search▲

Price & Availability of AM55-0004

	To Download AM55-0004 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .